谁有VHDL顺序语言编写的16-3编码器的程序！急用，谢谢！

Question

错了，应该是16-4编码器，真是不好意思啊！

Answer 1

这段是8位优先编码器的程序。希望可以借鉴里边的程序，举一反三！
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY encode IS
PORT (
a : IN std_logic_vector(7 DOWNTO 0);
c : OUT std_logic_vector(7 DOWNTO 0);
en : OUT std_logic_vector(7 DOWNTO 0));
END encode;

ARCHITECTURE arch OF encode IS

SIGNAL c_tmp : std_logic_vector(3 DOWNTO 0);

BEGIN
en<= "00000000" ;

PROCESS(a)
BEGIN
if(a(7)='1') then c_tmp<="1000";
elsif(a(6)='1') then c_tmp<="0111";
elsif(a(5)='1') then c_tmp<="0110";
elsif(a(4)='1') then c_tmp<="0101";
elsif(a(3)='1') then c_tmp<="0100";
elsif(a(2)='1') then c_tmp<="0011";
elsif(a(1)='1') then c_tmp<="0010";
elsif(a(0)='1') then c_tmp<="0001";
else c_tmp<="0000";
end if;
END PROCESS;

PROCESS(c_tmp)
BEGIN
CASE c_tmp IS
WHEN "0000" =>
c <= "00000011";
WHEN "0001" =>
c <= "10011111";
WHEN "0010" =>
c <= "00100101";
WHEN "0011" =>
c <= "00001101";
WHEN "0100" =>
c <= "10011001";
WHEN "0101" =>
c <= "01001001";
WHEN "0110" =>
c <= "01000001";
WHEN "0111" =>
c <= "00011111";
WHEN "1000" =>
c <= "00000001";
WHEN "1001" =>
c <= "00011001";
WHEN "1010" =>
c <= "00010001";
WHEN "1011" =>
c <= "11000001";
WHEN "1100" =>
c <= "01100011";
WHEN "1101" =>
c <= "10000101";
WHEN "1110" =>
c <= "01100001";
WHEN "1111" =>
c <= "01110001";
WHEN OTHERS =>
NULL;

END CASE;
END PROCESS;

END arch;

Answer 2

应该是8_3编码器吧！！！！
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY ENCODE8_3 IS
PORT(KD:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
LED:OUT STD_LOGIC_VECTOR(2 DOWNTO 0));
END ENCODE8_3;
ARCHITECTURE ART OF ENCODE8_3 IS
BEGIN
WITH KD SELECT
LED<="000"WHEN"11111110",
"001"WHEN"11111101",
"010"WHEN"11111011",
"011"WHEN"11110111",
"100"WHEN"11101111",
"101"WHEN"11011111",
"110"WHEN"10111111",
"111"WHEN"01111111",
"000"WHEN OTHERS;
END ART;本回答被提问者采纳