关于测量一块的，你给的三个都不好，能不能换一下。。。。。。
追答你把你的论文题目给我，别总给我模糊的东西，费劲半天，也没合适的
追问数字电压表
追答[1] Behzad Razavi.Design of Analog CMOS Integrated Circuits[M]. . 2001
[2] Rhee W.Design of high-performance CMOS charge pumps inphase-locked loops. IEEE International Symposium on Cir-cuits and Systems. 1999 [3] Todd Charles Weigandt.Low-phase-noise,low-timing-jitter design techniques for delay cell based VCOs and frequency synthesizers[C]//PHDthesis. . 1998
[4] George Lee,Karina Ng,Edmond Kwang.Design of ring oscillator based voltage controlled oscillator. Project Final Report[R]. 2005 [5] T. C. Weigandt,B. Kim,and P. R. Gray.Analysis of Timing Jitter in CMOS Ring Oscillators. IEEE International Symposium on Circuits and Systems. 1994
[6] Nonis R,Da Dalt N,Palestri P,et al.Modeling,design andcharacterization of a new low-jitter analog dual tuning LC-VCOPLL architecture[J]. IEEE Journal of Solid State Circuits. 2005 [7] Lim Kyoohyun,Park Chanhong,Kim Dalsoo,et al.A low-noise phase-locked loop design by loop bandwidth optimization. IEEE Journal of SolidState Circuits. 2000
[8] Boerstler D W.A low-jitter PLL clock generator for microprocessors with lock range of 340 ~ 612MHz. IEEE Journal of Solid State Circuits. 1999 [9] Lee Jri.High-Speed Circuit Designs for Transmittersin Broad-band Data Links. IEEE Journal of Solid-State Circuits[J]. 2006
[10] Adrian Maxim,Ramin K.Poorfard,Richard A.Johnson,et al.A Fully Integrated 0.13-μm CMOS Digital Low-IF DBS Satellite Tuner Using a Ring Oscillator-Based Frequency Synthesizer. IEEE Journal of Solid State Circuits. 2007
看着有用的用吧，再不行我就没招了，你自己去google搜索吧，英文关键词加点pdf